Verification Engineer – Digital ASIC / System on Chip (SoC) Design

As a hardware developer, you will specify, design and verify hardware components of complex ASICs and SoCs with embedded microprocessors (RISC-V) in System-Verilog. You will also work with constrained random coverage-driven testbenches using the UVM Framework. In detail, this means:

• By performing feature extraction from register-transfer level (RTL) specifications, you will produce verification plans that are supported by metrics obtained from simulation.
• You will also generate, maintain, and expand test benches based on the UVM framework.
• Using your profound knowledge, you will also contribute to tasks like test development and debugging.
• When working with a device under test (DUT), you will develop precise coverage models.
• By writing SVA assertions and scoreboard checkers, you will ensure the correct operation of the DUT.
• Last but not least, you will prepare, execute and analyze regression runs.

Fraunhofer is not only the largest organization for applied research (application-oriented research organisation) in Europe, but also a top-rated employer. How so? 

• Our institute culture: We want our colleagues to feel comfortable. Therefore, we constantly strive to ensure a friendly and supportive working atmosphere within our international team.
• Exciting activities: With customers and partners across the globe, we provide an attractive working environment in a highly innovative key industry with exciting ventures and new experiences.
• Room for creativity: We want to give our colleagues a generous amount of creative freedom so that they can contribute and develop their own ideas.
• Personal development: With top-of-the-range company equipment and regular training, we aim to provide the best possible working conditions and development opportunities for our colleagues.
• Flexible working hours: Due to our wide range of offers, we make it easy for our colleagues to find a comfortable balance between their private and professional lives. 

The weekly working time is 39 hours. The position is initially limited to 2 years with the aim to extend it subsequently.

We value and promote the diversity of our employees' skills and therefore welcome all applications – regardless of age, gender, nationality, ethnic and social origin, religion, worldview, disability, sexual orientation and identity. Severely disabled persons are given preference in the event of equal suitability. Appointment, remuneration, and social security benefits are based on the German public-sector collective wage agreement (TVöD). Additionally, Fraunhofer may grant performance-based variable remuneration components.

With its focus on developing key technologies that are vital for the future and enabling the commercial utilization of this work by business and industry, Fraunhofer plays a central role in the innovation process. As a pioneer and catalyst for groundbreaking developments and scientific excellence, Fraunhofer helps to shape society both in the present and in the future.